non-homogeneous register architecture Last modified: Monday, November 27, 2006
Non-homogeneous register architectures are frequently encountered in Application Specific Instruction Set Processors (ASIPs). These processors usually have a set of very specialized functional units, and associated registers, that are used to efficiently implement operations with performance requirements that frequently occur in the application domain of the processor. Examples of these type of units include Multiply and Accumulate Units (MAC) and Address Calculation Units (ACU). [Source: Optimal Code Generation for Embedded Memory Non-Homogeneous Register Architectures] Contrast with homogeneous register architecture.
•E-mail this definition to a colleague• For internet.com pages about non-homogeneous register architecture . Also check out the following links! Optimal Code Generation for Embedded Memory Non-Homogeneous Register Architectures  This paper examines the problem of code-generation for expression trees on non-homogeneous register set architectures.	Memory Microprocessors architecture CPU homogeneous register architecture instruction instruction cycle instruction register memory operand processor register Give Us Your Feedback Shopping non register architecture Products Compare Products,Prices and Stores Shop by Category: Random Access Memory (RAM) 9 Model Matches Motherboards 3 Model Matches