homogeneous register architecture Last modified: Monday, November 27, 2006
In homogeneous register architectures, the selection of an instruction has no connection whatsoever with the types of registers that the instruction uses. Selecting instructions for non-homogeneous register architectures usually requires allocating register types for the operands and resulting data. As a consequence, the IR patterns associated with instructions in this kind of processor should carry information regarding the type of register the instruction uses. [Source: Optimal Code Generation for Embedded Memory Non-Homogeneous Register Architectures] Contrast with non-homogeneous register architecture.
•E-mail this definition to a colleague• For internet.com pages about homogeneous register architecture . Also check out the following links! Optimal Code Generation for Embedded Memory Non-Homogeneous Register Architectures  This paper examines the problem of code-generation for expression trees on non-homogeneous register set architectures.	Memory Microprocessors architecture CPU instruction instruction register memory non-homogeneous register architecture operand processor register Give Us Your Feedback Shopping register architecture Products Compare Products,Prices and Stores Shop by Category: Books 8 Model Matches Random Access Memory (RAM) 9 Model Matches Servers 4 Model Matches