In homogeneous register architectures, the selection of an
instruction has no connection whatsoever with the
types of
registers that the instruction uses.
Selecting instructions for non-homogeneous register architectures usually
requires allocating register types for the
operands
and resulting data. As a consequence, the IR patterns associated with
instructions in this kind of processor should carry information regarding the
type of register the instruction uses.
[Source:
Optimal Code Generation for Embedded Memory Non-Homogeneous Register
Architectures]
Contrast with
non-homogeneous register architecture.
